Synopsys has launched Custom Compiler, a design solution intended to close what the company calls a FinFET productivity gap. Dave Reed, director of marketing for Synopsys’ mixed signal and analogue ...
MOUNTAIN VIEW, Calif., Mar. 30, 2016 – Synopsys, Inc. (Nasdaq: SNPS) today unveiled Custom Compiler™, a new custom design solution that closes the FinFET productivity gap by shortening custom design ...
SAN JOSE, Calif. -- 26 Sep 2014 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that its digital and custom/analog tools have achieved ...
FinFET transistors are now in production at the major foundries, having gone from drawing board to products on the shelf in record time. FinFET adoption has been growing steadily because they deliver ...
FinFETs are not simple to work with. They’re difficult to manufacture, tricky to design, and they run the risk of greatly increased dynamic power density—particularly at 14/16nm, where extra margin is ...
The industry is gradually migrating toward chips based on finFET transistors at 16nm/14nm and beyond, but manufacturing those finFETs is proving to be a daunting challenge in the fab. Patterning is ...
Since the inception of the integrated-circuit (IC) industry, design metrics such as performance, power, area, cost, and time-to-market have remained the same. In fact, Moore’s law is all about ...
The IC industry is already weeding out the candidates. In 2005, the Semiconductor Research Corp. (SRC), a chip R&D consortium, launched the Nanoelectronics Research Initiative (NRI), a group that is ...
The Cadence custom/analog and digital implementation and signoff tools have been validated by TSMC on high-performance reference designs in order to provide customers with the fastest path to design ...
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